Jack Warecki

General Engineering Faculty/Advisor
Affiliate Director, PLTW
ESSC Advisor


B. S. Mathematics Education (Ohio State University)
M. S. Mathematics (Ohio State University)
Executive M.B.A. (Haas School of Business, U.C. Berkeley)

Programmer for Space Shuttle satellite launches (Inertial Upper Stage – IUS)

Research and Development for Electronic Design Automation (EDA) systems for Very High Speed Integrated Circuit (VHSIC) and Application Specific Integrated Circuit (ASIC) design

Developed one of the first Hierarchical Verification Systems and Cell Layout Synthesis tools for Integrated Circuit design

Lab Manager for Integrated Circuit Design for space-related applications

Circuits designed for CASSINI spacecraft

Teaching and Commercial Experience
Mathematics Instructor: Ohio State University, El Camino College, Menlo College

Engineering Instructor: Introduction to Engineering Lecturer, San Jose State University

Affiliate Director for Project Lead the Way (PLTW), San Jose State University

Sr Vice President, Synopsys Inc

Managed worldwide organization for support, consulting and training for EDA tools

Graduate Teaching Assistant of the Year; Ohio State University

Outstanding Lecturer; San Jose State University